Improved current-source sizing for high-speed high-accuracy current steering d/a converters

摘要

This paper describes a design methodology for the basic current\udsource cell circuit of high-speed high-accuracy current steering\udDIA conveners taking into account mismatching in all the\udtransistors of the cell. Previous works consider arbitrary safety\udmargins in the sizing process. The presented approach allows a\udmore accurale selection of the optimal design point. The design\udmethodology is illustrated for a particular design of a 0.35pm\udCMOS 12-bit 400 MHz current-steering segmented DIA converter.